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Status Not under consideration
Categories C/C++
Created by Guest
Created on Jul 4, 2013

Provide some 64-bit compiler intrinsics when compiling 32-bit on a 64- bit architecture

The xlC compiler supplies (many) intrinsics that be used in lieu of
assembly. Some of these intrinsic work on 32-bit words, and some on 64- bit double-words. (There are many others, but our interest here is 32- bit and 64-bit).
__lwarx() load-word-and-reserve
__stwcx() store-word-conditional
__ldarx() load-double-word-and-reserve
__stdcx() store-double-word-conditional

The latter two (operating on double-word) are only available when
compiling 64-bit, even if the architecture is running on a 64-bit POWER
CPU.

Similarly, xlC does not provide intrinsics for 64-bit compare-and-swap
when compiling in 32-bit. Need to compile 64-bit for
__compare_and_swaplp(). <sys/atomic.h> and AIX libc.a provide
compare_and_swaplp(), but the prototype is 'long' with is 32-bits in a
32-bit compile.

We request that xlC provide for *32-bit compilation* some 64-bit
intrinsics (when compiler target is 64-bit hardware architecture) that
operate on int64_t or uint64_t (uint64_t preferred), and/or provide
callable functions in 32-bit libc.a that operate on 64-bit quantities.

In 32-bit compilation, our other vendors provide simple solutions for
basic 64-bit compare-and-swap. We can provide details, if you are
interested.

Idea priority Medium
  • Guest
    Reply
    |
    Dec 15, 2020

    IBM XL C/C++ for AIX is a continuous delivery offering, and aims to satisfy the needs of a rapidly evolving market segment.
    Product strategy evolves and requirements are continuously evaluated against that strategy. This RFE has recently been reappraised against the wider product strategy and does not fall into IBMs delivery plans for the next 12 month. Whilst this RFE might be valid and we might look to deliver it longer term, this RFE is being rejected at this time. The requirement will be kept in our internal RFE backlog and might be reassessed in the future.

  • Guest
    Reply
    |
    Sep 14, 2015

    Due to processing by IBM, this request was reassigned to have the following updated attributes:
    Brand - Servers and Systems Software
    Product family - Programming Languages
    Product - C/C++ Compilers

    For recording keeping, the previous attributes were:
    Brand - Rational
    Product family - Design & development
    Product - C/C++ Compilers

  • Guest
    Reply
    |
    Oct 15, 2013

    This RFE will be planned for a future release.

  • Guest
    Reply
    |
    Sep 27, 2013

    This RFE is planned to be in a future release.

  • Guest
    Reply
    |
    Aug 9, 2013

    Thanks for the reply. We are still evaluating this RFE. We shall let you know if we have any further questions.

  • Guest
    Reply
    |
    Aug 6, 2013

    To answer the question: Yes, we want to atomically update a 64-bit value
    in 32-bit mode, when on 64-bit architecture, as when we compile with
    the '-qarch=pwr5' compiler option.

    Also, answering an earlier question, we think that performance should
    not be any slower when compiled 32-bit compared to compiled 64-bit as
    long as the underlying hardware is 64-bit (again, e.g for pwr5).

  • Guest
    Reply
    |
    Aug 2, 2013

    Hi, we need more information regarding your usage case for the request.

    Are you wanting to atomically update a 64-bit value in 32-bit mode ?

    Can you please provide more details? Thanks.

  • Guest
    Reply
    |
    Jul 31, 2013

    We are continuing to evaluate this RFE.