Skip to Main Content
IBM Z Software


This portal is to open public enhancement requests against IBM Z Software products. To view all of your ideas submitted to IBM, create and manage groups of Ideas, or create an idea explicitly set to be either visible by all (public) or visible only to you and IBM (private), use the IBM Unified Ideas Portal (https://ideas.ibm.com).


Shape the future of IBM!

We invite you to shape the future of IBM, including product roadmaps, by submitting ideas that matter to you the most. Here's how it works:

Search existing ideas

Start by searching and reviewing ideas and requests to enhance a product or service. Take a look at ideas others have posted, and add a comment, vote, or subscribe to updates on them if they matter to you. If you can't find what you are looking for,

Post your ideas
  1. Post an idea.

  2. Get feedback from the IBM team and other customers to refine your idea.

  3. Follow the idea through the IBM Ideas process.


Specific links you will want to bookmark for future use

Welcome to the IBM Ideas Portal (https://www.ibm.com/ideas) - Use this site to find out additional information and details about the IBM Ideas process and statuses.

IBM Unified Ideas Portal (https://ideas.ibm.com) - Use this site to view all of your ideas, create new ideas for any IBM product, or search for ideas across all of IBM.

ideasibm@us.ibm.com - Use this email to suggest enhancements to the Ideas process or request help from IBM for submitting your Ideas.

ADD A NEW IDEA

C/C++

Showing 35

Inline __asm() to communicate ARCHLVL to HLASM for system macros

When a z/OS system macro is embedded in a __asm() block, HLASM assumes ARCHLVL=1 which means the macro will use base+displacement branching, which fails in an inline __asm() block due to "no active USING". Most macros implement a MF=E form which g...
about 6 years ago in C/C++ and Fortran Compilers / C/C++ 3 Not under consideration

Reliable indicator of AMODE in F7SA chain

When using Metal C, calling an ASCmode=AR function creates an ambiguous F7SA save area (in the DSA chain). The AMODE is switched BEFORE the call (BASR) is executed, and restored AFTER the return, so the AMODE of the caller (and therefore the DSAUS...
over 6 years ago in C/C++ and Fortran Compilers / C/C++ 2 Not under consideration

Raise a severe error if an unknown instruction is generated

If the Compiler/Optimizer generates an invalid unknown instruction (UNKWN), it have to raise a Severe Error. The assembly list shows unknown ?UNKWN? instructions: 000027 | ALRK r8,r7,r9 000027 | UNKWN r15,r3 000027 | UNKWN r8,r6 000027 | C r0,s.uw...
about 8 years ago in C/C++ and Fortran Compilers / C/C++ 7 Not under consideration

#pragma report should be extended to C

It is very frustrating that this pragma is not available in C, but only in C++!
almost 9 years ago in C/C++ and Fortran Compilers / C/C++ 4 Not under consideration

Perform optimizations based on __attribute__((__malloc__))

Currently, __attribute__((__malloc__)) does not work as documented in the compiler docs. The documentation infers that the compiler performs certain optimizations when using __malloc__ attribute. However, it appears that the compiler simply tolera...
almost 9 years ago in C/C++ and Fortran Compilers / C/C++ 4 Not under consideration

Using CPACF with HW built-In instructions

ISV likes to use HW Crypto support of CPACF (see Principles of Operation) in their applications running on z/OS. As of requiremts of their architecture and as of performance reasons, they do not use ICSF. So they have to use the CPACF instructions...
over 9 years ago in C/C++ and Fortran Compilers / C/C++ 7 Not under consideration

RFE for header file cache optimization on C compiler

We would like to see the following implemented with the C compiler frontend just like it is for the C++ compiler frontend beginning with Xlc 12.1: -qxflag=dircache[,m[,n]] where m and n are optional * m is a integral prime number between 2 and 71 ...
over 10 years ago in C/C++ and Fortran Compilers / C/C++ 5 Not under consideration

Enabling the IBM LinuxONE and IBM Power 10 ( or later ) C/C++ Compilers to integrate with Intel oneAPI

Intel oneAPI is an open, cross-architecture programming model that frees developers to use a single code base across multiple architectures. The result is accelerated compute without vendor lock-in. for more information : https://www.intel.com/con...
about 1 year ago in C/C++ and Fortran Compilers / C/C++ 5 Not under consideration

Adding IBM Deep search with ChatGPT Codex (or IBM Coding Services) by AI driven Coding training and inference ( can be Human Supervised)

Using IBM Deep search with Coding services will train the AI System for Optimized code and it will make the software development more efficient in coding, testing, tracking and debugging. Also may be add the AI driven DevOps Orchestration
over 1 year ago in C/C++ and Fortran Compilers / C/C++ 11 Not under consideration

Have C compile optionally use non deprecated instruction BALR and use BASR

Today if I want to call an assembler program from C it uses BALR. This is deprecated, and I need special code to support it. The compiler needs an option to say "use Branch and save (BASR) instead of BALR"
almost 2 years ago in C/C++ and Fortran Compilers / C/C++ 8 Not under consideration