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IBM High Level Assembler for z/OS and z/VM

Showing 40 of 8224

HLASM toolkit needs to support line-mode programs which use PUTGET and TGET macros

The HLASM Toolkit needs to support line-mode programs such as those which use the PUTGET and TGET macros/services. When such programs are tested using the Toolkit, the macros return invalid command buffer data. The Toolkit tests the programs as 32...
over 10 years ago in IBM High Level Assembler for z/OS and z/VM / Toolkit 2 Not under consideration

Allow the underscore separators to improve readability.

From the assembler list (ASSEMBLER-LIST Digest - 3 Jun 2012 to 4 Jun 2012 (#2012-101)) Allow underscore in values: for example allow the developer to code:A DC F'2_147_483_647' rather than A DC F'2 147 483 647' or A DC F'2147483647'
almost 12 years ago in IBM High Level Assembler for z/OS and z/VM / Assembler 5 Not under consideration

Improve how the move instruction with differing lengths is handled

There has been a lot of discussion on the assembler forum on issues with the MVC and differing length fields. Sample macros have been added that help assist in this area. Many customers have home written macros. Example statements include: 'Storag...
almost 12 years ago in IBM High Level Assembler for z/OS and z/VM / Assembler 5 Not under consideration

New extended mnemonics needed for branches/jumps following TMLL and friends

New extended mnemonics are needed for "branch/jump [not]mixed" instructions to be used following the newer Test Under Mask instructions. The older TM instruction never sets CC=2, so the older branch/jump [not]mixed mnemonics (JM, JNM and similar) ...
about 2 years ago in IBM High Level Assembler for z/OS and z/VM / Assembler 2 Not under consideration

Change ASMA033I severity from 0 to 4

Our product requires 241 separate assemblies. When reviewing a gen, we take closer looks at any assembly having a non-0 completion code. ASMA033I errors currently are SEV 0. That means that they get missed when a GEN is reviewed. If they were chan...
about 2 years ago in IBM High Level Assembler for z/OS and z/VM / Assembler 4 Future consideration

Permit named PUSH/POP statements

When the assembler reaches an END statement, and there remains unPOP'd PUSH USINGs, it issues ASMA138W . Well, in large complex assemblies, finding the unPOP'd PUSH or PUSHs can be rather a challenge. In my own coding, I have solved that by replac...
about 2 years ago in IBM High Level Assembler for z/OS and z/VM / Assembler 1 Not under consideration

Fully support 32-bit EQUs (maybe even 64-bit EQUs as well)

The assembler's support of 32-bit EQUs is arcane, to say the least. Consider: EQU1 EQU X'80000000' EQU2 EQU X'80000000'+1 EQU3 EQU X'7FFFFFFF'+1 The EQU1 and EQU2 statements are fine.The EQU3 statement gets flagged with ASMA074E. I do understand t...
about 2 years ago in IBM High Level Assembler for z/OS and z/VM / Assembler 3 Not under consideration

ISRSUPC Support Of Datasets Created With Large Block Interface

Request for ISRSUPC (batch program for SUPERC compare) to support datasets created with Large Block Interface.
almost 9 years ago in IBM High Level Assembler for z/OS and z/VM / Assembler 4 Not under consideration

Identify concatenation number in SRCHFOR of sequential DSNs

When a SuperC SRCHFOR operation is performed on a concatenation of PDSes, the listing will identify a concatenation number for the data set containing the member where the string was found. But when the concatenation is of sequential data sets, th...
about 9 years ago in IBM High Level Assembler for z/OS and z/VM / Toolkit 3 Not under consideration

Flag RX instructions with index but no base register

It has been a common malpractice since more than half a century not to use a base register but the index register in rx instructions, e.g. L Ra,100(Rb) instead of L Ra,100(,Rb). Historically, this implied some performance penalty (AFAIR), nowadays...
about 1 year ago in IBM High Level Assembler for z/OS and z/VM / Assembler 2 Not under consideration

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